# RISC-V Compliance Test RV32I Makefrag
#
# Copyright (c) 2017, Codasip Ltd.
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# Description: Makefrag for RV32I compliance tests

rv32i_sc_tests = \
    I-ENDIANESS-01 \
    I-RF_x0-01 \
    I-RF_size-01 \
    I-RF_width-01 \
    I-DELAY_SLOTS-01 \
    I-JAL-01 \
    I-JALR-01 \
    I-LUI-01 \
    I-AUIPC-01 \
    I-LW-01 \
    I-LH-01 \
    I-LHU-01 \
    I-LB-01 \
    I-LBU-01 \
    I-SW-01 \
    I-SH-01 \
    I-SB-01 \
    I-ADD-01 \
    I-ADDI-01 \
    I-AND-01 \
    I-OR-01 \
    I-ORI-01 \
    I-XORI-01 \
    I-XOR-01 \
    I-SUB-01 \
    I-ANDI-01 \
    I-SLTI-01 \
    I-SLTIU-01 \
    I-BEQ-01 \
    I-BNE-01 \
    I-BLT-01 \
    I-BLTU-01 \
    I-BGE-01 \
    I-BGEU-01 \
    I-SRLI-01 \
    I-SLLI-01 \
    I-SRAI-01 \
    I-SLL-01 \
    I-SRL-01 \
    I-SRA-01 \
    I-SLT-01 \
    I-SLTU-01 \
    I-NOP-01 \
    I-ECALL-01 \
    I-EBREAK-01 \
    I-IO-01 \

    # These tests are broken due to flaws in riscv-compliance rather than
    # Ibex/OpenTitan (see https://github.com/lowRISC/ibex/issues/100)
    #I-MISALIGN_JMP-01
    #I-MISALIGN_LDST-01


rv32i_tests = $(addsuffix .elf, $(rv32i_sc_tests))

target_tests += $(rv32i_tests)
